4.管脚默认状态
| Pin Name | Default drive level for I/O before the Reset Is Deasserted | Default Function | When the Core Power Is not Powered on and the I/O Power Is Powered on |
After the Core Power and I/O Power Are Powered on and Before the Reset Is Deasserted |
Before U-Boot Running and After Reset Deassertion | Chip Internal Pull-up/Pull-down Resistor |
Constraints | ||||
| For details about the I/O levels and drive strength, see the DC/AC electrical specifications in chapter 2 "Hardware" of the chip data sheet. A higher level indicates greater drive strength. The following uses the four I/O levels as an example: level 4 > level 3 > level 2 > level 1. You must set a proper level based on the actual scenario. |
Multiplexing Function | Level State | I/O type | Internal pull-up and pull-down resistance: | |||||||
| Level State | I/O type | Level State | I/O type | (It is recommended that the pins marked with the L/H state not be multiplexed as GPIO pins.) |
See the DC/AC electrical specifications in "Hardware" of the chip data sheet. |
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| The level states are described as follows: L: output low level; H: output high level; Z: high impedance; PU: input state with internal pull-up; PD: input state with internal pull-down; X: undetermined state;NA:don’t care. |
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| EMMC_CLK | IO4档位1 | GPIO0_5 | L | X | PD | I | GPIO0_5 | PD | I | RPU4/RPD4 | NA |
| NF_DQ6 | L/H，由通信内容决定 | B | Nand Flash启动 | ||||||||
| EMMC_CLK | L/H，由通信内容决定 | O | EMMC 启动 | ||||||||
| EMMC_CMD | IO4档位1 | GPIO0_6 | H | X | PU | I | GPIO0_6 | PU | I | RPU4/RPD4 | NA |
| NF_DQ7 | L/H，由通信内容决定 | B | Nand Flash启动 | ||||||||
| EMMC_CMD | L/H，由通信内容决定 | B | EMMC 启动 | ||||||||
| EMMC_DATA0 | IO4档位1 | GPIO0_7 | H | X | PU | I | GPIO0_7 | PU | I | RPU4/RPD4 | NA |
| NF_WEN | L/H，由通信内容决定 | O | Nand Flash启动 | ||||||||
| EMMC_DATA0 | L/H，由通信内容决定 | B | EMMC 启动 | ||||||||
| EMMC_DATA1 | IO4档位1 | GPIO1_0 | H | X | PU | I | GPIO1_0 | PU | I | RPU4/RPD4 | NA |
| NF_ALE | L/H，由通信内容决定 | O | Nand Flash启动 | ||||||||
| EMMC_DATA1 | L/H，由通信内容决定 | B | EMMC 启动 | ||||||||
| EMMC_DATA2 | IO4档位1 | GPIO1_1 | H | X | PU | I | GPIO1_1 | PU | I | RPU4/RPD4 | NA |
| NF_CLE | L/H，由通信内容决定 | O | Nand Flash启动 | ||||||||
| EMMC_DATA2 | L/H，由通信内容决定 | B | EMMC 启动 | ||||||||
| EMMC_DATA3 | IO4档位1 | GPIO1_2 | H | X | PU | I | GPIO1_2 | PU | I | RPU4/RPD4 | NA |
| NF_DQ3 | L/H，由通信内容决定 | B | Nand Flash启动 | ||||||||
| EMMC_DATA3 | L/H，由通信内容决定 | B | EMMC 启动 | ||||||||
| EMMC_DATA4 | IO4档位1 | SFC_WP_IO2 | H | X | PU | I | SFC_WP_IO2 | L/H，由通信内容决定 | B | RPU4/RPD4 | SPI Nor/Nand Flash启动 |
| NF_DQ0 | L/H，由通信内容决定 | B | Nand Flash启动 | ||||||||
| EMMC_DATA4 | L/H，由通信内容决定 | B | 8线EMMC启动 | ||||||||
| EMMC_DATA5 | IO4档位1 | SFC_HOLD_IO3 | H | X | PU | I | SFC_HOLD_IO3 | L/H，由通信内容决定 | B | RPU4/RPD4 | SPI Nor/Nand Flash启动 |
| NF_DQ2 | L/H，由通信内容决定 | B | Nand Flash启动 | ||||||||
| EMMC_DATA5 | L/H，由通信内容决定 | B | 8线EMMC启动 | ||||||||
| EMMC_DATA6 | IO4档位1 | SFC_MISO_IO1 | H | X | PU | I | SFC_MISO_IO1 | L/H，由通信内容决定 | B | RPU4/RPD4 | SPI Nor/Nand Flash启动 |
| NF_DQ1 | L/H，由通信内容决定 | B | Nand Flash启动 | ||||||||
| EMMC_DATA6 | L/H，由通信内容决定 | B | 8线EMMC启动 | ||||||||
| EMMC_DATA7 | IO4档位1 | SFC_CLK | H | X | L | O | SFC_CLK | L/H，由通信内容决定 | O | RPU4/RPD4 | SPI Nor/Nand Flash启动 |
| NF_CSN | L/H，由通信内容决定 | O | Nand Flash启动 | ||||||||
| EMMC_DATA7 | L/H，由通信内容决定 | B | 8线EMMC启动 | ||||||||
| EMMC_DS | IO4档位1 | SFC_MOSI_IO0 | L | X | PD | I | SFC_MOSI_IO0 | L/H，由通信内容决定 | B | RPU4/RPD4 | SPI Nor/Nand Flash启动 |
| NF_DQ4 | L/H，由通信内容决定 | B | Nand Flash启动 | ||||||||
| EMMC_DS | L/H，由通信内容决定 | I | 8线EMMC启动 | ||||||||
| EMMC_RST_N | IO2档位1 | GPIO1_3 | H | X | PU | I | GPIO1_3 | PU | I | RPU1/RPD1 | SPI Nor/Nand Flash启动 |
| NF_DQ5 | L/H，由通信内容决定 | B | Nand Flash启动 | ||||||||
| EMMC_RST_N | L/H，由通信内容决定 | O | EMMC启动 | ||||||||
| SFC_CS0N | IO2档位1 | SFC_CS0N | H | X | H | O | SFC_CS0N | L/H，由通信内容决定 | O | RPU1/RPD1 | SPI Nor/Nand Flash启动 |
| NF_REN | L/H，由通信内容决定 | O | Nand Flash启动 | ||||||||
| GPIO1_4 | PU | I | NA | ||||||||
| SFC_CS1N | IO2档位1 | SFC_CS1N | H | X | H | O | SFC_CS1N | L/H，由通信内容决定 | O | RPU1/RPD1 | SPI Nor/Nand Flash启动 |
| NF_RDY | L/H，由通信内容决定 | I | Nand Flash启动 | ||||||||
| GPIO1_5 | PU | I | NA | ||||||||
| USB_1_VBUS | IO2档位1 | GPIO1_6 | L | X | PD | I | GPIO1_6 | PD | I | RPU1/RPD1 | NA |
| USB_1_VBUS | PU | I | USB升级 | ||||||||
| USB_1_PWREN | IO2档位1 | GPIO1_7 | L | X | PD | I | GPIO1_7 | PD | I | RPU1/RPD1 | NA |
| USB_1_OVRCUR | IO2档位1 | GPIO2_0 | L | X | PD | I | GPIO2_0 | PD | I | RPU1/RPD1 | NA |
| USB_0_PWREN | IO2档位1 | GPIO2_1 | L | X | PD | I | GPIO2_1 | PD | I | RPU1/RPD1 | NA |
| USB_0_OVRCUR | IO2档位1 | GPIO2_2 | L | X | PD | I | GPIO2_2 | PD | I | RPU1/RPD1 | NA |
| SVB_PWM0 | IO2档位1 | GPIO2_3 | L | X | PD | I | GPIO2_3 | PD | I | RPU1/RPD1 | NA |
| SVB_PWM1 | IO2档位1 | GPIO2_4 | L | X | PD | I | GPIO2_4 | PD | I | RPU1/RPD1 | NA |
| SVB_PWM2 | IO2档位1 | GPIO2_5 | L | X | PD | I | GPIO2_5 | PD | I | RPU1/RPD1 | NA |
| RGMII0_RXD3 | IO5_1档位1 | GPIO2_6 | L | X | PD | I | GPIO2_6 | PD | I | RPU2/RPD2 | NA |
| RGMII0_RXD2 | IO5_1档位1 | GPIO2_7 | L | X | PD | I | GPIO2_7 | PD | I | RPU2/RPD2 | NA |
| RGMII0_RXD1 | IO5_1档位1 | GPIO3_0 | L | X | PD | I | GPIO3_0 | PD | I | RPU2/RPD2 | NA |
| RGMII0_RXD0 | IO5_1档位1 | GPIO3_1 | L | X | PD | I | GPIO3_1 | PD | I | RPU2/RPD2 | NA |
| RGMII0_RXDV | IO5_1档位1 | GPIO3_2 | L | X | PD | I | GPIO3_2 | PD | I | RPU2/RPD2 | NA |
| RGMII0_RXCK | IO5_1档位1 | GPIO3_3 | L | X | PD | I | GPIO3_3 | PD | I | RPU2/RPD2 | NA |
| RGMII0_TXD3 | IO5_1档位1 | GPIO3_4 | L | X | PD | I | GPIO3_4 | PD | I | RPU2/RPD2 | NA |
| RGMII0_TXD2 | IO5_1档位1 | GPIO3_5 | L | X | PD | I | GPIO3_5 | PD | I | RPU2/RPD2 | NA |
| RGMII0_TXD1 | IO5_1档位1 | GPIO3_6 | L | X | PD | I | GPIO3_6 | PD | I | RPU2/RPD2 | NA |
| RGMII0_TXD0 | IO5_1档位1 | GPIO3_7 | L | X | PD | I | GPIO3_7 | PD | I | RPU2/RPD2 | NA |
| RGMII0_TXEN | IO5_1档位1 | GPIO4_0 | L | X | PD | I | GPIO4_0 | PD | I | RPU2/RPD2 | NA |
| RGMII0_TXCKOUT | IO5_1档位1 | TEST_CLK | L | X | L | O | TEST_CLK | L/H，由通信内容决定 | O | RPU2/RPD2 | NA |
| EPHY0_CLK | IO5_1档位1 | GPIO4_2 | L | X | PD | I | GPIO4_2 | PD | I | RPU2/RPD2 | NA |
| EPHY0_RSTN | IO5_1档位1 | GPIO4_3 | L | X | PD | I | GPIO4_3 | PD | I | RPU2/RPD2 | NA |
| MDCK0 | IO5_1档位1 | GPIO4_4 | L | X | PD | I | GPIO4_4 | PD | I | RPU2/RPD2 | NA |
| MDIO0 | IO5_1档位1 | GPIO4_5 | L | X | PD | I | GPIO4_5 | PD | I | RPU2/RPD2 | NA |
| SDIO1_CDATA0 | IO5_1档位1 | GPIO4_6 | L | X | PD | I | GPIO4_6 | PD | I | RPU2/RPD2 | NA |
| SDIO1_CDATA1 | IO5_1档位1 | GPIO4_7 | L | X | PD | I | GPIO4_7 | PD | I | RPU2/RPD2 | NA |
| SDIO1_CDATA2 | IO5_1档位1 | GPIO5_0 | L | X | PD | I | GPIO5_0 | PD | I | RPU2/RPD2 | NA |
| SDIO1_CDATA3 | IO5_1档位1 | GPIO5_1 | L | X | PD | I | GPIO5_1 | PD | I | RPU2/RPD2 | NA |
| SDIO1_CCLK_OUT | IO5_1档位1 | GPIO5_2 | L | X | PD | I | GPIO5_2 | PD | I | RPU2/RPD2 | NA |
| SDIO1_CCMD | IO5_1档位1 | GPIO5_3 | L | X | PD | I | GPIO5_3 | PD | I | RPU2/RPD2 | NA |
| GPIO0_0 | IO5_1档位1 | GPIO0_0 | L | X | PU | I | GPIO0_0 | PU | I | RPU2/RPD2 | NA |
| GPIO0_1 | IO5_1档位1 | GPIO0_1 | L | X | PD | I | GPIO0_1 | PD | I | RPU2/RPD2 | NA |
| UART1_RXD | IO5_1档位1 | GPIO5_4 | L | X | PD | I | GPIO5_4 | PD | I | RPU2/RPD2 | NA |
| UART1_TXD | IO5_1档位1 | GPIO5_5 | L | X | PD | I | GPIO5_5 | PD | I | RPU2/RPD2 | NA |
| UART1_RTSN | IO5_1档位1 | GPIO5_6 | L | X | PD | I | GPIO5_6 | PD | I | RPU2/RPD2 | NA |
| UART1_CTSN | IO5_1档位1 | GPIO5_7 | L | X | PD | I | GPIO5_7 | PD | I | RPU2/RPD2 | NA |
| UART2_RXD | IO5_1档位1 | GPIO6_0 | L | X | PD | I | GPIO6_0 | PD | I | RPU2/RPD2 | NA |
| UART2_TXD | IO5_1档位1 | GPIO6_1 | L | X | PD | I | GPIO6_1 | PD | I | RPU2/RPD2 | NA |
| UART2_RTSN | IO5_1档位1 | GPIO6_2 | L | X | PD | I | GPIO6_2 | PD | I | RPU2/RPD2 | NA |
| UART2_CTSN | IO5_1档位1 | GPIO6_3 | L | X | PD | I | GPIO6_3 | PD | I | RPU2/RPD2 | NA |
| SDIO0_CARD_DETECT | IO5_1档位1 | GPIO6_4 | L | X | PD | I | GPIO6_4 | PD | I | RPU2/RPD2 | NA |
| SDIO0_CARD_DETECT | L/H，由通信内容决定 | I | SD卡升级 | ||||||||
| SDIO0_CARD_POWER_EN_N | IO5_1档位1 | GPIO6_5 | L | X | PD | I | GPIO6_5 | PD | I | RPU2/RPD2 | NA |
| SDIO0_CARD_POWER_EN_N | L/H，由通信内容决定 | O | SD卡升级 | ||||||||
| SDIO0_CCMD | IO5_2档位1 | GPIO6_6 | L | X | PD | I | GPIO6_6 | PD | I | RPU3/RPD3 | NA |
| SDIO0_CCMD | L/H，由通信内容决定 | B | SD卡升级 | ||||||||
| SDIO0_CDATA0 | IO5_2档位1 | GPIO6_7 | L | X | PD | I | GPIO6_7 | PD | I | RPU3/RPD3 | NA |
| SDIO0_CDATA0 | L/H，由通信内容决定 | B | SD卡升级 | ||||||||
| SDIO0_CDATA1 | IO5_2档位1 | GPIO7_0 | L | X | PD | I | GPIO7_0 | PD | I | RPU3/RPD3 | NA |
| SDIO0_CDATA1 | L/H，由通信内容决定 | B | SD卡升级 | ||||||||
| SDIO0_CDATA2 | IO5_2档位1 | GPIO7_1 | L | X | PD | I | GPIO7_1 | PD | I | RPU3/RPD3 | NA |
| SDIO0_CDATA2 | L/H，由通信内容决定 | B | SD卡升级 | ||||||||
| SDIO0_CDATA3 | IO5_2档位1 | GPIO7_2 | L | X | PD | I | GPIO7_2 | PD | I | RPU3/RPD3 | NA |
| SDIO0_CDATA3 | L/H，由通信内容决定 | B | SD卡升级 | ||||||||
| SDIO0_CCLK_OUT | IO5_2档位1 | GPIO7_3 | L | X | PD | I | GPIO7_3 | PD | I | RPU3/RPD3 | NA |
| SDIO0_CCLK_OUT | L/H，由通信内容决定 | O | SD卡升级 | ||||||||
| DSI_D3N | NA | DSI_D3N | Z | X | Z | X | DSI_D3N | Z | X | NA | NA |
| DSI_D3P | NA | DSI_D3P | Z | X | Z | X | DSI_D3P | Z | X | NA | NA |
| DSI_D1N | NA | DSI_D1N | Z | X | Z | X | DSI_D1N | Z | X | NA | NA |
| DSI_D1P | NA | DSI_D1P | Z | X | Z | X | DSI_D1P | Z | X | NA | NA |
| DSI_CKN | NA | DSI_CKN | Z | X | Z | X | DSI_CKN | Z | X | NA | NA |
| DSI_CKP | NA | DSI_CKP | Z | X | Z | X | DSI_CKP | Z | X | NA | NA |
| DSI_D0N | NA | DSI_D0N | Z | X | Z | X | DSI_D0N | Z | X | NA | NA |
| DSI_D0P | NA | DSI_D0P | Z | X | Z | X | DSI_D0P | Z | X | NA | NA |
| DSI_D2N | NA | DSI_D2N | Z | X | Z | X | DSI_D2N | Z | X | NA | NA |
| DSI_D2P | NA | DSI_D2P | Z | X | Z | X | DSI_D2P | Z | X | NA | NA |
| SPI2_SCLK | IO2档位1 | GPIO8_6 | L | X | PD | I | GPIO8_6 | PD | I | RPU1/RPD1 | NA |
| SPI2_SDO | IO2档位1 | GPIO8_7 | L | X | PD | I | GPIO8_7 | PD | I | RPU1/RPD1 | NA |
| SPI2_SDI | IO2档位1 | GPIO9_0 | L | X | PD | I | GPIO9_0 | PD | I | RPU1/RPD1 | NA |
| SPI2_CSN | IO2档位1 | GPIO9_1 | L | X | PD | I | GPIO9_1 | PD | I | RPU1/RPD1 | NA |
| VSYNC_TE_MIPITX | IO2档位1 | GPIO0_2 | L | X | PD | I | GPIO0_2 | PD | I | RPU1/RPD1 | NA |
| GPIO0_3 | IO2档位1 | GPIO0_3 | L | X | PD | I | GPIO0_3 | PD | I | RPU1/RPD1 | NA |
| GPIO0_4 | IO2档位1 | GPIO0_4 | L | X | PD | I | GPIO0_4 | PD | I | RPU1/RPD1 | NA |
| HDMI_HOTPLUG | IO6_2档位1 | GPIO9_2 | L | X | Z | I | GPIO9_2 | Z | I | NA | NA |
| HDMI_SDA | IO6_2档位1 | GPIO9_3 | L | X | Z | I | GPIO9_3 | Z | I | NA | NA |
| HDMI_SCL | IO6_2档位1 | GPIO9_4 | L | X | Z | I | GPIO9_4 | Z | I | NA | NA |
| LSADC_CH0 | IO2档位1 | LSADC_CH0 | L | X | PD | I | LSADC_CH0 | PD | I | RPU1/RPD1 | NA |
| LSADC_CH1 | IO2档位1 | LSADC_CH1 | L | X | PD | I | LSADC_CH1 | PD | I | RPU1/RPD1 | NA |
| LSADC_CH2 | IO2档位1 | LSADC_CH2 | L | X | PD | I | LSADC_CH2 | PD | I | RPU1/RPD1 | NA |
| LSADC_CH3 | IO2档位1 | LSADC_CH3 | L | X | PD | I | LSADC_CH3 | PD | I | RPU1/RPD1 | NA |
| JTAG_TRSTN | IO2档位1 | JTAG_TRSTN | L | X | PD | I | JTAG_TRSTN | PD | I | RPU1/RPD1 | NA |
| JTAG_TCK | IO2档位1 | JTAG_TCK | L | X | PD | I | JTAG_TCK | PD | I | RPU1/RPD1 | NA |
| JTAG_TMS | IO2档位1 | JTAG_TMS | H | X | PU | I | JTAG_TMS | PU | I | RPU1/RPD1 | NA |
| JTAG_TDO | IO2档位1 | JTAG_TDO | L | X | PD | I | JTAG_TDO | PD | I | RPU1/RPD1 | NA |
| L/H，由通信内容决定 | O | BootRom JTAG调试开启 | |||||||||
| JTAG_TDI | IO2档位1 | JTAG_TDI | H | X | PU | I | JTAG_TDI | PU | I | RPU1/RPD1 | NA |
| WDG_RSTN | IO2档位1 | WDG_RSTN | L | X | PD | I | WDG_RSTN | PD | O | RPU1/RPD1 | POR_ENABLE==0 |
| SYS_RSTN_OUT | L | O | SYS_RSTN_OUT | H | O | POR_ENABLE==1 | |||||
| RSTN | IO2档位1 | RSTN | H | X | PU | I | RSTN | PU | I | RPU1/RPD1 | NA |
| TEST_MODE | IO2档位1 | TEST_MODE | L | X | PD | I | TEST_MODE | PD | I | RPU1/RPD1 | NA |
| POR_ENABLE | IO2档位1 | POR_ENABLE | H | X | PU | I | POR_ENABLE | PU | I | RPU1/RPD1 | NA |
| UART0_RXD | IO2档位1 | GPIO10_6 | H | X | PU | I | UART0_RXD | PU | I | RPU1/RPD1 | NA |
| UART0_TXD | IO2档位1 | GPIO10_7 | L | X | PD | I | UART0_TXD | PD | I | RPU1/RPD1 | NA |
| UART3_RXD | IO2档位1 | GPIO11_0 | L | X | PD | I | GPIO11_0 | PD | I | RPU1/RPD1 | NA |
| UART3_TXD | IO2档位1 | GPIO11_1 | L | X | PD | I | GPIO11_1 | PD | I | RPU1/RPD1 | NA |
| UART4_RXD | IO2档位1 | GPIO11_2 | L | X | PD | I | GPIO11_2 | PD | I | RPU1/RPD1 | NA |
| UART4_TXD | IO2档位1 | GPIO11_3 | L | X | PD | I | GPIO11_3 | PD | I | RPU1/RPD1 | NA |
| I2C0_SDA | IO6_2档位1 | GPIO11_4 | L | X | Z | I | GPIO11_4 | Z | I | NA | NA |
| I2C0_SCL | IO6_2档位1 | GPIO11_5 | L | X | Z | I | GPIO11_5 | Z | I | NA | NA |
| SENSOR1_HS | IO2档位1 | GPIO11_6 | L | X | PD | I | GPIO11_6 | PD | I | RPU1/RPD1 | NA |
| SENSOR1_VS | IO2档位1 | GPIO11_7 | H | X | PU | I | GPIO11_7 | PU | I | RPU1/RPD1 | NA |
| SENSOR1_RSTN | IO2档位1 | GPIO12_0 | L | X | PD | I | GPIO12_0 | PD | I | RPU1/RPD1 | NA |
| SENSOR1_CLK | IO2档位1 | GPIO12_1 | L | X | PD | I | GPIO12_1 | PD | I | RPU1/RPD1 | NA |
| SPI1_CSN1 | IO2档位1 | GPIO12_2 | L | X | PD | I | GPIO12_2 | PD | I | RPU1/RPD1 | NA |
| SPI1_CSN0 | IO2档位1 | GPIO12_3 | L | X | PD | I | GPIO12_3 | PD | I | RPU1/RPD1 | NA |
| SPI1_SDI | IO2档位1 | GPIO12_4 | L | X | PD | I | GPIO12_4 | PD | I | RPU1/RPD1 | NA |
| SPI1_SDO | IO2档位1 | GPIO12_5 | L | X | PD | I | GPIO12_5 | PD | I | RPU1/RPD1 | NA |
| SPI1_SCLK | IO2档位1 | GPIO12_6 | L | X | PD | I | GPIO12_6 | PD | I | RPU1/RPD1 | NA |
| MIPI_RX1_D0N | NA | MIPI_RX1_D0N | Z | X | Z | X | MIPI_RX1_D0N | Z | X | NA | NA |
| MIPI_RX1_D0P | NA | MIPI_RX1_D0P | Z | X | Z | X | MIPI_RX1_D0P | Z | X | NA | NA |
| MIPI_RX1_D2N | NA | MIPI_RX1_D2N | Z | X | Z | X | MIPI_RX1_D2N | Z | X | NA | NA |
| MIPI_RX1_D2P | NA | MIPI_RX1_D2P | Z | X | Z | X | MIPI_RX1_D2P | Z | X | NA | NA |
| MIPI_RX1_CK0N | NA | MIPI_RX1_CK0N | Z | X | Z | X | MIPI_RX1_CK0N | Z | X | NA | NA |
| MIPI_RX1_CK0P | NA | MIPI_RX1_CK0P | Z | X | Z | X | MIPI_RX1_CK0P | Z | X | NA | NA |
| MIPI_RX1_CK1N | NA | MIPI_RX1_CK1N | Z | X | Z | X | MIPI_RX1_CK1N | Z | X | NA | NA |
| MIPI_RX1_CK1P | NA | MIPI_RX1_CK1P | Z | X | Z | X | MIPI_RX1_CK1P | Z | X | NA | NA |
| MIPI_RX1_D1N | NA | MIPI_RX1_D1N | Z | X | Z | X | MIPI_RX1_D1N | Z | X | NA | NA |
| MIPI_RX1_D1P | NA | MIPI_RX1_D1P | Z | X | Z | X | MIPI_RX1_D1P | Z | X | NA | NA |
| MIPI_RX1_D3N | NA | MIPI_RX1_D3N | Z | X | Z | X | MIPI_RX1_D3N | Z | X | NA | NA |
| MIPI_RX1_D3P | NA | MIPI_RX1_D3P | Z | X | Z | X | MIPI_RX1_D3P | Z | X | NA | NA |
| MIPI_RX0_D0N | NA | MIPI_RX0_D0N | Z | X | Z | X | MIPI_RX0_D0N | Z | X | NA | NA |
| MIPI_RX0_D0P | NA | MIPI_RX0_D0P | Z | X | Z | X | MIPI_RX0_D0P | Z | X | NA | NA |
| MIPI_RX0_D2N | NA | MIPI_RX0_D2N | Z | X | Z | X | MIPI_RX0_D2N | Z | X | NA | NA |
| MIPI_RX0_D2P | NA | MIPI_RX0_D2P | Z | X | Z | X | MIPI_RX0_D2P | Z | X | NA | NA |
| MIPI_RX0_CK0N | NA | MIPI_RX0_CK0N | Z | X | Z | X | MIPI_RX0_CK0N | Z | X | NA | NA |
| MIPI_RX0_CK0P | NA | MIPI_RX0_CK0P | Z | X | Z | X | MIPI_RX0_CK0P | Z | X | NA | NA |
| MIPI_RX0_CK1N | NA | MIPI_RX0_CK1N | Z | X | Z | X | MIPI_RX0_CK1N | Z | X | NA | NA |
| MIPI_RX0_CK1P | NA | MIPI_RX0_CK1P | Z | X | Z | X | MIPI_RX0_CK1P | Z | X | NA | NA |
| MIPI_RX0_D1N | NA | MIPI_RX0_D1N | Z | X | Z | X | MIPI_RX0_D1N | Z | X | NA | NA |
| MIPI_RX0_D1P | NA | MIPI_RX0_D1P | Z | X | Z | X | MIPI_RX0_D1P | Z | X | NA | NA |
| MIPI_RX0_D3N | NA | MIPI_RX0_D3N | Z | X | Z | X | MIPI_RX0_D3N | Z | X | NA | NA |
| MIPI_RX0_D3P | NA | MIPI_RX0_D3P | Z | X | Z | X | MIPI_RX0_D3P | Z | X | NA | NA |
| SENSOR0_CLK | IO2档位1 | GPIO15_7 | L | X | PD | I | GPIO15_7 | PD | I | RPU1/RPD1 | NA |
| SENSOR0_RSTN | IO2档位1 | GPIO16_0 | H | X | PU | I | GPIO16_0 | PU | I | RPU1/RPD1 | NA |
| SENSOR0_HS | IO2档位1 | GPIO16_1 | L | X | PD | I | GPIO16_1 | PD | I | RPU1/RPD1 | NA |
| SENSOR0_VS | IO2档位1 | GPIO16_2 | L | X | PD | I | GPIO16_2 | PD | I | RPU1/RPD1 | NA |
| SPI0_SCLK | IO2档位1 | GPIO16_3 | L | X | PD | I | GPIO16_3 | PD | I | RPU1/RPD1 | NA |
| SPI0_SDO | IO2档位1 | GPIO16_4 | L | X | PD | I | GPIO16_4 | PD | I | RPU1/RPD1 | NA |
| SPI0_SDI | IO2档位1 | GPIO16_5 | L | X | PD | I | GPIO16_5 | PD | I | RPU1/RPD1 | NA |
| SPI0_CSN | IO2档位1 | GPIO16_6 | L | X | PD | I | GPIO16_6 | PD | I | RPU1/RPD1 | NA |
| PWM0_OUT0_0_P | IO2档位1 | GPIO16_7 | L | X | PD | I | GPIO16_7 | PD | I | RPU1/RPD1 | NA |
| PWM0_OUT1_0_P | IO2档位1 | GPIO17_0 | L | X | PD | I | GPIO17_0 | PD | I | RPU1/RPD1 | NA |